CMOS Digital Pixel for Binary Morphological Edge Segmentation

A digital pixel for binary morphological image processing is presented. The pixel is designed to be integrated into a vision chip with parallel architecture, in order to compute edge segmentation. The pixel contains 11 transistors working with analog signal and 20 transistor working with digital signal; pixel layout size is 115.2 mum times 89.4 mum; fill factor is 1.85%; 1.2 mum CMOS standard technology from AMI is used for prototyping; random noise is 2.7 mV; peak analog output signal to noise ratio is 44 dB; optical dynamic range is 53 dB; dark current is 11 mV/s; processing time is 3.5 ms; maximum power dissipation is 264 muW.